Here is a download of a 77-page JTAG tutorial from ASSET InterTech. If you'd like a hardcopy of this book sent to you, go to this page and provide your mailing address. You can find more information on JTAG at the ASSET InterTech website

Link to pdf of tutorial
http://www.asset-intertech.com/pdfs/Boundary-Scan_Tutorial_2007.pdf

Link to mailing address form
http://www.asset-intertech.com/registration.cfm?lnk=primer

Link from ASSET to more JTAG resources
http://www.asset-intertech.com/boundary_scan_leadership.cfm

Also:

http://www.inaccessnetworks.com/projects/ianjtag/jtag-intro/jtag-intro.html

http://www.engr.udayton.edu/faculty/jloomis/ece446/notes/jtag/jtag1.html

http://www.circuitcellar.com/library/resourcepage/1099/c109r12.asp

AVR specific

http://www.circuitcellar.com/library/print/0602/fred143/index.htm

Boundary-Scan Tutorial

http://www.ezytech.com/asset/pdfs/boundaryscan_tutorial.pdf

Very good repository of JTAG references:

http://uclinux.home.at ( got to "JTAGS" directory)

1.2. May I use JTAG interface for remote debugging?

YES , of course – it is what JTAG for!

Sometimes different terms are used, as following:

OCD ( On Circuit Debugger)
ICE (In Circuit Emulator)
BDM (Background Debug Mode)

Future reading

http://www.ocdemon.net/zenofbdm.pdf

1.3. May I use JTAG interface for FLASH memory programming?

YES , of course – it is what JTAG for!

1.4. What part of JTAG standard is CPU agnostic?

JTAG specification is in Std IEEE 1149.1 (costs about $100). I don't
have it. Please search at internet for some JTAG related documents.
This is good: http://www-s.ti.com/sc/psheets/ssya002c/ssya002c.pdf

JTAG state machine [insert here]

JTAG standard signal [insert here]

That's all! You just have to write software to go through the states of JTAG FSM (here is the state diagram of this FSM: http://www.inaccessnetworks.com/projects/ianjtag/jtag-intro/jtag-state-machine-large.png). TCK and TMS are used to go through the states of FSM. And TDI is used to serially send through this interface your commands and data to JTAG controller on the IC (in your case, to the ARM uC) and read back reply through the TDO pin. The only problem is that some companies do not open all details about available custom JTAG commands (JTAG standard defines only 2 necessary commands: EXTEST and SAMPLE and some optional commmands like INTEST, BIST and others). For example, Texas Instruments do not give an access to the description of commands that are used for In-Circuit Debugging of their TMS DSPs. Instead of, they sell this JTAG ICD with simple software for about 1000$!!! Nice business - such a price for 4 wires and some I/O ICs! ;-)

1.5. What CPUs architectures have a build-in JTAG support?

AVR060: JTAG ICE Communication Protocol for 8-bit AVR Microcontrolers
http://www.atmel.com/atmel/acrobat/doc2524.pdf

ATmega128:JTAG Interface and On-chip Debug System, Page 245 to 272
http://www.atmel.com/atmel/acrobat/doc2467.pdf

Schematics for High-Speed BDM Pod for the Coldfire CPU

http://www.fortunecity.com/campus/psychology/493/bdm/bdm.htm

ARM7TDMI build in ICE (see Chapter 5 and Appendix B)

http://www.arm.com/pdfs/DDI0210B_7TDMI_R4.pdf

1.6. JTAG support for ARM architecture?

ARM7TDMI build in ICE (see Chapter 5 and Appendix B)

http://www.arm.com/pdfs/DDI0210B_7TDMI_R4.pdf

1.7. What is a usual JTAG header pin-out?

More pin-outs see at http://www.ocdemon.net/pinouts.pdf

1.7.1. 14-pin JTAG header

Usual pin-out for 14-pin JTAG header (often used for ARM)

1 -Vddh (+3.3v)	2 - Vss (ground)
3 - nTRST	4 - Vss (ground)
5 - TDI	6 -Vss (ground)
7 - TMS	8 -Vss (ground)
9 - TCK	10-Vss (ground)
11- TDO	12-nRESET (optional)
13- Vddh (+3.3v)	14-Vss (ground)

1.7.2. 20-pin JTAG header

Usual pin-out for 20-pin JTAG header (sometimes used for ARM)

1 - Vddh (+3.3v)	2 - Vddh (+3.3v)
3 - nTRST	4-Vss (ground)
5 - TDI	6-Vss (ground)
7 - TMS	8-Vss (ground)
9 - TCK	10-Vss (ground)
11 --------	12-Vss (ground)
13 –TDO	14-Vss (ground)
15 – nRST	16-Vss (ground)
17---------	18-Vss (ground)
19---------	20-Vss (ground)

1.7.3. 8-pin JTAG header

Usual pin-out for 8-pin JTAG header, often used for PLD programming

1 – vddh (+3.3v)

2 – TDO

3 – TDI

4 – nTRST

6 – TMS

7 – vss (ground)

8 – TCK

2. What hardware do I need to connect to the JTAG interface?

2.1. Where to buy JTAG adapter?

JTAG adapter can be purchased from multiple sources. Many embedded OS companies ( WindRiver and similar) are offering JTAG adapters with their debuggers and other testing software. Unfortunately, these packages are very expensive – usually a few thousand dollars.

Following companies have more or less reasonable product offerings

(Disclaimer: author(s) of this chapter have no direct commercial interest whatsoever in following companies.(Note: please do an appropriate disclaimer for new submissions if otherwise ))

2.1.1. Macraigor Systems LLS

Macraigor Systems (http://www.ocdemon.net/) is known as a vendor of reasonably inexpensive JTAG solutions. Their Wiggler ( $150) parallel port adapter became de-facto a standard for a simple buffered JTAG adapters. Due its simplicity , Macraigor Wiggler is easily cloned by home-made JTAGs ( see more in “How to build JTAG” section)

Macraigor Systems is offered a FLASH programming software ( $500), a free simple On-Chip-Debugger (OCD Commander - http://www.ocdemon.net/ocd_dbgr.exe ) and a free LibRemote daemon for interfacing GDB/Insight remote debuggers ( see CYGWIN version at http://www.ocdemon.com/Windows98NT/ArmLibRemoteInstallation.exe ).

2.1.2. AZ-Electronics

AZ_Electronics (http://az-electronics.com/item9.htm ) is offering a cheap ( $35) parallel port JTAG adapter.

2.1.3. JtagConnection

JtagConnection (http://www.jtagconnection.com/index.php) is offering a cheap ( $35-40) parallel port JTAG adapter.

2.1.4. Rowley Associates

Rowley Associates introduce its CrossConnect – USB 1.1 fast JTAG adapter with retail price of about £150.

http://www.rowley.co.uk/

2.1.5. Amontec

Amontec sells a very nice programmable JTAG dongle, the Chameleon POD.
It can be programmed as Macraigor Wiggler or Raven.
http://www.amontec.com/chameleon.shtml

2.2. How to build JTAG adapter?

http://www.lart.tudelft.nl/projects/jtag/jtag-lart_schematic.pdf

http://www.lart.tudelft.nl/projects/jtag/

A simplified non-buffered version may be found at http://axl.freeyellow.com/iPAQ/jtag.htm . Please note that not-buffered JTAG adapter has an increased posibility to damage your host’s parallel port circuit.

2.2.4. ALTERA JTAG

ALTERA ByteBlast Parallel Port Adaptor

http://www.altera.com/literature/ds/dsbyte.pdf

2.2.5. ColdFire BDM Pod

I've made by myself an High-Speed BDM Pod for the Coldfire CPU, i've
found the schematics at
http://www.fortunecity.com/campus/psychology/493/bdm/bdm.htm

2.2.6. Serial Jtag

http://mspgcc.sourceforge.net/jtagF14x.pdf

http://cvs.sourceforge.net/viewcvs.py/mspgcc/jtag/

http://mspgcc.sourceforge.net/manual/x1560.html#pyserjtag

3. What software do I need to use JTAG for remote debugging?

3.1. OCD Commander

OCD Commander - http://www.ocdemon.net/ocd_dbgr.exe

3.2. LibRemote for GDB

CYGWIN version at http://www.ocdemon.com/Windows98NT/ArmLibRemoteInstallation.exe

How to use LibRemote for ARM under CYGWIN environment:

4. What software do I need for FLASH memory programming?

4.1. Intel JFlash

Original Intel program for memory flash for SA1110 dev board. Contains source for Windows utility JFlash.

http://www.intel.com/design/strong/swsup/downloads/SA1110JFlashKit_V12.exe

Works with LART JTAG parallel port adapter (see above).

4.2. JFlash for linux

As a part of LART project, this is a Linux port of Intel JFlash utility.

http://www.lart.tudelft.nl/projects/jtag/jflash-linux.tar.gz

Some modifications and corrections from TuxScreen hacking project

http://cvs.sourceforge.net/viewcvs.py/tuxscreen/jflash/

Works with LART JTAG parallel port adapter (see above).

5. Open Source JTAG Software Projects

5.1. ARMTOOL from MIDORI distribution

Erwin Authried <eauth at softsys.co.at> is maintaining Embedded Linux & uClinux distribution (MIDORI distribution - http://cvs.home.at/midori/ ) . ARMTOOL is a small, but important utility in this distribution (some part of the source).

ARMTOOL (http://cvs.home.at/midori/sources/armtool/) is a very simple JTAG monitor that supports upload and download a binary image into memory and its execution. ARMTOOL is ARM7TDMI specific (some part of code is derived from GDBICE project), but may work with some of ARM9 cores (to be tested). Current version supports JTAG adapters compatible with Macgraigor Wiggler, Altera ByteBlasterMV and Xilinx Parallel port JTAG adapter.

In addition to ARMTOOL, MIDORI distribution includes patch for GDB/Insight debugger to use JTAG interface for remote debugging.

Also, BOOTLOADER module contain a simple ARM program which maybe used for flashing a new image into FLASH memory ( FLASHPROG).

5.1.1. HOWTO compile ARMTOOL

(outside of full MIDORI source tree)

http://hri.sourceforge.net/tools/armtool.html

Petr Novak wrote a patch that extends armtool capabilities: patch README (updated 20/Jan/2004)

5.1.2. HOWTO compile FLASHPROG

(outside of full MIDORI source tree)

5.1.3. HOWTO compile GDB/Insight

(outside of full MIDORI source tree)

5.2. GDBICE

GDBICE (http://sourceforge.net/projects/gdbice/) is and open source SW/HW project by Ramon Longo <rlongo at users.sourceforge.net>. It is an attempt to design JTAG remote debugging for ARM7TDMI cores. Unfortunately, this project was not pass above an initial “proof-of-concept” implementation and not supported anymore.

However, this project’s source code maybe useful for someone who need a crash introduction into JTAG and its ARM specifics.