00000080 <L0_0x80>:
;
;	switch to supervisor mode
;
      80:	mrs	r1, CPSR
      84:	bic	r1, r1, #0x1f	; clean mode bits
      88:	orr	r1, r1, #0xd3	; set supervisor mode
      8c:	msr	CPSR_fc, r1
;
;	disable all interrupts
;
      90:	mov	r2, #-2080374784; 0x84000000 - INTC Interrupt control 
      94:	mvn	r1, #0	; r1<- 0xffffffff
      98:	str	r1, [r2, #0x0c] ; disable all IRQs
;
;	Setup FLASH control registers
;
      9c:	mov	r2, #1073741824	; 0x40000000 - SMC - Flash control register
      a0:	ldr	r3, [r2]
      a4:	mov	r1, #64256	; 0xfb00
      a8:	add	r1, r1, #239	; 0xef
      ac:	bic	r3, r3, r1	; 		clean 0xfbef
      b0:	orr	r3, r3, #1024	; 0x400
      b4:	orr	r3, r3, #15	; 0xf
      b8:	orr	r3, r3, #992	; 0x3e0
      bc:	orr	r3, r3, #63488	; 0xf800	set 0xffef
      c0:	str	r3, [r2]	; flash bank 0
      c4:	str	r3, [r2, #4]	; flash bank 1
;
;	Set ROM size to 1Mbyte
;
      c8:	mov	r2, #-2013265920; 0x88000000 - Switch registers 
      cc:	mov	r3, #2	; 0x2	; set flash size to 1M
      d0:	str	r3, [r2, #0x1c] ; 
;
;	SDRAM initialisation
;
      d4:	mov	r2, #1140850688	; 0x44000000 - SDC - SDRAM control register
      d8:	mov	r3, #10	; 0xa

000000dc <L3_0xDC>:
      dc:	nop			(mov r0,r0)
      e0:	nop			(mov r0,r0)
      e4:	subs	r3, r3, #1	; 0x1
      e8:	bne	dc <L3_0xDC>	;wait
      ec:	mov	r3, #3	; 0x3
      f0:	str	r3, [r2, #4]	; set M and I bits (NOP to SDRAM)
      f4:	mov	r3, #20	; 0x14

000000f8 <L4_0xF8>:
      f8:	nop			(mov r0,r0)
      fc:	nop			(mov r0,r0)
     100:	subs	r3, r3, #1	; 0x1
     104:	bne	f8 <L4_0xF8>	; wait
     108:	mov	r3, #1	; 0x1
     10c:	str	r3, [r2, #4]	; issue PALL to SDRAM
     110:	mov	r3, #10	; 0xa
     114:	str	r3, [r2, #8]	; set refresh timer
     118:	mov	r3, #10	; 0xa

0000011c <L5_0x11C>:
     11c:	nop			(mov r0,r0)
     120:	nop			(mov r0,r0)
     124:	subs	r3, r3, #1	; 0x1
     128:	bne	11c <L5_0x11C>
     12c:	mov	r3, #800	; 0x320
     130:	str	r3, [r2, #8]	; set SDRAM refresh timer
     134:	mov	r3, #2	; 0x2
     138:	str	r3, [r2, #4]	; enable SDRAM MODE command
;
;
;
     13c:	mov	r1, #34	; 0x22
     140:	mov	r3, #536870912	; 0x20000000 - SDRAM memory start addr (before swap)
     144:	add	r3, r3, r1, lsl #12
     148:	ldr	r1, [r3]	; read word from SDRAM memory
     14c:	mov	r1, #27262976	; 0x1a00000
     150:	str	r1, [r2]	; set SDC control register0
     154:	mov	r1, #4	; 0x4
     158:	str	r1, [r2, #4]	; set SDC control register1
     15c:	mov	r1, #64	; 0x40
     160:	str	r1, [r2, #0x1c] ; no documentation for this regster
     164:	mov	r3, #100	; 0x64

00000168 <L6_0x168>:
     168:	nop			(mov r0,r0)
     16c:	nop			(mov r0,r0)
     170:	subs	r3, r3, #1	; 0x1
     174:	bne	168 <L6_0x168>	; wait
;
;^ end of SDRAM initialisation
;----------------
;
;
     178:	mov	r2, #1073741824	; 0x40000000 - SMC - Flash control register
     17c:	ldr	r1, [r2]
     180:	orr	r1, r1, #1024	; 0x400
     184:	str	r1, [r2]
     188:	ldr	r1, [r2, #8]
     18c:	orr	r1, r1, #1024	; 0x400
     190:	str	r1, [r2, #8]
;
;  Setup GPIO
;
     194:	mov	r2, #-2013265920; 0x88000000 - Switch registers 
; GPIO[7:0]
     198:	ldr	r1, [pc, #40]	; 1c8 (0x88980047)
     19c:	str	r1, [r2, #0xb8] ; GPIO_config0
     1a0:	mov	r1, #65536	; 0x10000
; GPIO[15:10] as input/ no output
     1a4:	add	r1, r1, #254	; 0xfe
     1a8:	str	r1, [r2, #0xbc] ; GPIO_config1
     1ac:	mov	r1, #81	; 0x51
     1b0:	str	r1, [r2, #0xc0] ; GPIO_config2
     1b4:	ldr	sp, [pc, #0]	; 1bc (0x203b4780)
     1b8:	ldr	pc, [pc, #0]	; 1c0 (0x000001cc) goto 1cc:
     1bc:	203b4780 
     1c0:	000001cc
     1c4:	00000000
     1c8:	88980047
;
;
;
     1cc:	mov	r6, r0	; 	0x3afffffc
     1d0:	mov	r7, r1	; 	0x00000051
     1d4:	mov	r8, r2	; 	0x88000000
     1d8:	mov	r0, #20	; 0x14
     1dc:	mov	r1, #1	; 0x1
     1e0:	bl	1138 <F130_0x1138> ; do nothing function????
     1e4:	cmp	r0, #0	; 0x0
     1e8:	ldr	r5, [pc, #76]	; 23c (0x000001f4)
     1ec:	sub	r5, pc, r5
     1f0:	bne	204 <L8_0x204>
     1f4:	mov	r1, r6
     1f8:	mov	r2, r7
     1fc:	mov	r3, r8
     200:	b	214 <L9_0x214>

00000204 <L8_0x204>:
     204:	ldr	sp, [pc, #56]	; 244 (0x203b4780)
     208:	mov	r1, #0	; 0x0
     20c:	mov	r2, #0	; 0x0
     210:	mov	r3, #0	; 0x0

00000214 <L9_0x214>:
     214:	mov	fp, #0	; 0x0
     218:	ldr	r0, [pc, #32]	; 240 (0x00000248)
     21c:	add	r0, r0, r5
     220:	bl	500 <F10_0x500> ; ????????????
     224:	mov	r0, #0	; 0x0
     228:	swp	r0, r0, [r0]
     22c:	swi	0x00000000
     230:	swi	0x00000001
     234:	swi	0x00000002

00000238 <L11_0x238>:
     238: 	b	238 <L11_0x238>
     23c:	000001f4 	streqd	r0, [r0], -r4
     240:	00000248 	andeq	r0, r0, r8, asr #4
     244:	203b4780 	eorcss	r4, fp, r0, lsl #15
     248:	00000001 	andeq	r0, r0, r1
     24c:	000001cc 	andeq	r0, r0, ip, asr #3
     250:	00000000 	andeq	r0, r0, r0
     254:	000011a0 	andeq	r1, r0, r0, lsr #3
	...